1. Field of the Invention
The present invention relates to PLL modulation circuit and polar modulation apparatus in wireless communication apparatus.
2. Description of the Related Art
Generally speaking, the PLL (Phase Locked Loop) modulation circuit is expected to realize low costs, low power consumption, and excellent noise characteristics and modulation accuracy. To improve the modulation accuracy of a PLL modulation circuit, the PLL frequency bandwidth (i.e. PLL bandwidth) is preferably wider than the frequency bandwidth of the modulation signal (i.e. modulation bandwidth).
However, widening the bandwidth of the PLL modulation circuit has the risk of causing deterioration in noise characteristics. So, as a technique for enabling a wideband PLL modulation circuit, two-point modulation is presently proposed whereby the bandwidth of a PLL modulation circuit is set narrower than the bandwidth of a modulation signal and modulation is performed inside and outside the bandwidth of the PLL modulation circuit at two different points (see, for example, U.S. Pat. No. 6,211,747).
FIG. 1 shows a simplified view of a conventional wideband PLL modulation circuit. The conventional PLL modulation circuit shown in FIG. 1 has a PLL section which includes: voltage controlled oscillator (VCO) 1 that changes the oscillation frequency in accordance with the voltage applied to a control voltage terminal (Vt); frequency divider 2 that divides the frequency of an RF modulation signal (high frequency modulation signal) outputted from VCO1; phase comparator 4 that compares the phase of an output signal of frequency divider 2 and the phase of a reference signal and outputs a signal in accordance with the phase difference between the two signals; and loop filter 3 that equalizes the output signal of phase comparator 4.
In addition, the above conventional PLL modulation circuit has: modulation sensitivity table 7 that outputs a signal based on a modulation signal in accordance with modulation sensitivity characteristics; D/A convertor 10 that adjusts the gain of an output signal in accordance with a gain control signal from controller 6 and converts the output signal of modulation sensitivity table 7 into an analogue voltage; delta sigma modulator 9 that delta sigma modulates a signal combining the output signal of modulation sensitivity table 7 and channel selection information and outputs the result as to frequency divider 2 as a frequency division ratio; and A/D convertor 11 that outputs the voltage value at the control voltage terminal (Vt) into a digital signal and outputs the result to controller 6. Now, factors that influence the modulation accuracy of two-point modulation will be described below. Major factors that influence the modulation accuracy of two point modulation include the modulation level and the time gap between the two points. First, the modulation level will be explained. As mentioned above, two-point modulation refers to the scheme of performing modulation at two different points. FIG. 3 shows frequency characteristics of a PLL modulation circuit utilizing two-point modulation. This PLL modulation circuit has a transfer function of H(s), wheres =jω. H(s) has low pass characteristics such as shown in FIG. 3. When a modulation signal is added to a frequency division ratio set in frequency divider 2, a low pass filter of the transfer function H(s) blocks the high frequency component and allows only the low frequency component to pass. Meanwhile, when the modulation signal is added to the control voltage terminal of VCO 1, a high pass filter of the transfer function of 1-H(s) shown in FIG. 3 blocks the low frequency component and allows only the high frequency component to pass.
The two modulation components are added in the control voltage terminal of VCO1, so that the modulation signal achieves flat characteristics such as shown by the broken line in FIG. 3 and is sent to VCO1. As a result, it is possible to output from VCO1 wideband RF modulation signal 307 that goes beyond the bandwidth of the PLL modulation circuit. Now, a case will be described below where the modulation signal does not achieve flat characteristics. When a modulation signal cannot maintain flat characteristics, this might cause deterioration in modulation accuracy.
It is when the amplitude of the modulation signal inputted in the control voltage terminal of VCO1 and the modulation sensitivity of VCO 1 are not consistent that flat characteristics fail. The modulation sensitivity refers to the conversion gain obtained upon converting the amplitude of a modulation signal inputted in the control voltage terminal of VCO1 to a frequency deviation of RF modulation signal 307 outputted from VCO 1. The unit is [Hz/V]. Also, the ratio of the frequency of the modulation signal and the maximum frequency deviation is referred to as the modulation level.
When the amplitude of the modulation signal is not consistent with the modulation sensitivity, the transfer function 1-H(s) will fluctuate, as shown in FIG. 4. FIG. 4 illustrates the transfer function 1-H(s) with a deviation of a. In this case, as shown by the broken line in FIG. 4, the gain is high at higher frequencies and the combined characteristics with H(s) become non-flat. This is a factor that causes deterioration in modulation accuracy.
FIG. 5 shows an example of control voltage versus output frequency characteristics of the general VCO. The voltage versus frequency slope represents the modulation sensitivity. FIG. 5 shows that in this VCO the modulation sensitivity changes with the oscillation frequency. FIG. 6 shows oscillation frequency versus modulation sensitivity characteristics of the general VCO. FIG. 6 shows that the modulation sensitivity changes with the oscillation frequency. Now, a case will be described below where the control voltage (the amplitude of a modulation signal) needs to be changed in accordance with the characteristics of the modulation sensitivity of the VCO that change with the oscillation frequency. Assume that in VCO 1 the frequency is 2 GHz and the modulation sensitivity is 100 MHz/v and that the maximum frequency deviation of a modulation signal is 5 MHz. In this case, a signal having a maximum amplitude of 50 mV needs to be inputted in the control voltage terminal. However, assume now that the frequency of VCO1 becomes 2.1 GHz and the modulation sensitivity becomes 80 MHz/V. In this case, a signal having a maximum amplitude of 62.5 mV needs to be inputted in the control voltage terminal. That is, to obtain RF modulation signals having the same frequency deviation at different oscillation frequencies, it is necessary to change the amplitude of the modulation signals inputted in the control voltage terminal of the VCO in accordance with the oscillation frequency of the VCO and adjust the modulation level.
Incidentally, the modulation sensitivity with respect to the modulation component in the frequency division ratio set in frequency divider 2 is the frequency of the reference signal and does not change with the frequency of VCO 1. For example, a case will be described here where the frequency of VCO1 is 2 GHz, the frequency of a reference signal is 1 MHz, and the maximum frequency deviation of a modulation signal is 5 MHz. In this case, the maximum width of change of the frequency division ratio is 5. That is, this calculation does not depend on the frequency of VCO 1.
The conventional PLL modulation circuit of FIG. 1 holds the oscillation frequency versus modulation sensitivity characteristics of VCO 1 in table 7 and calculates how much the control voltage fluctuates when the channel frequency changes, thereby correcting the modulation level and adjusting the gain of the D/A convertor.
The components making up the VCO have individual differences (variations) due to the manufacturing and have different values. Consequently, the modulation sensitivity characteristics vary on a per LSI basis. As a solution to the problem that the modulation sensitivity characteristics change per LSI due to the above-noted variations between individual components, the conventional PLL modulation circuit needs to measure the modulation sensitivity in association with the frequency on a per LSI basis and hold the results in modulation sensitivity table 7.
However, to prepare modulation sensitivity table 7, the measurement of the modulation sensitivity has to be carried out for all channel frequencies for use, and with this the frequency of the PLL modulation circuit needs to be changed by the same number of times as the number of measurement points. Thus, preparing modulation sensitivity table 7 requires a great amount of time and might even increase manufacturing costs. Next, the time gap between two points will be explained. In two point modulation, after modulation is performed at two points, the values of the modulation signals are added and the result is inputted in the control voltage terminal of the VCO. If then there is a time gap between the modulation signals, this lowers the modulation accuracy. The above description of a conventional PLL modulation circuit does not explain the method of adjusting the time gap between two points, and the setting of adequate timings poses difficulty.
However, as described above, the conventional PLL modulation circuit suffers decrease in the modulation level and time gap between two points and thus has difficulty improving the modulation accuracy.